Msters thesis ideas

Hi all, I need some project ideas for my master’s thesis. I have three years of experience in FPGA design, and I am currently enrolled in a master’s program. I have access to ZCU104, ZCU102, Kintex, and Virtex boards. I would like to work on something related to hardware acceleration or high speed interfaces such as 10G Ethernet. These are still rough concepts, I have not finalized anything yet. Most of my work experience has been on Altera/Intel FPGA devices. I have worked with the Nios processor, a few low-freq serial communication protocols, and several custom board level features based on requirements from the hardware design team. The NIOS work was quite interesting but i cannot explain most of it because of the NDA. As a hobby project, I designed a UDP packet processor in pynq-z2 , but in that design, the PS handled the MAC and IP layers. I would love to offload as much of the packet processing functionality as possible to the PL fabric. I know that a design like this may not be entirely novel, but a part of me feels that doing something like this on my own would finally get rid of my imposter syndrome. Please help me identify a meaningful/challenging project idea. submitted by /u/bat_manushyan [link] [comments]